WOLF designs and manufactures 3U VPX video graphics modules that support the VPX REDI and OpenVPX standards. WOLF's 3U VPX boards include advanced NVIDIA GPUs and Xilinx FPGAs, providing video capture, video output, image and data processing, and video encoding to HEVC and AVC.
High speed GPUs and FPGAs provide the processing power required for High Performance Compute (HPC) and Artificial Intelligence (AI) tasks.
WOLF 3U VPX Products Table
|Product Name||WOLF Number||GPU/APU||CUDA Cores||Memory (GB)||Connectivity||Video Outputs - DisplayPort/HDMI/DVI||Video Outputs - SDI/Digital, Analog, Other||Video Inputs|
|VPX3U-AD5000E-VO||1538||NVIDIA Ada RTX5000E||9728||16||PCIe Gen4||4|
|VPX3U-AD5000E-CX7||153L||NVIDIA Ada RTX5000E, ConnectX-7||9728||16||40/100 GbE, PCIe Gen4|
|VPX3U-AD2000E-FGX2-IO||1570||NVIDIA Ada RTX2000E||3072||8||PCIe Gen4||1||up to 4 12G-SDI or ARINC 818||up to 2 12G-SDI or 4 3G-SDI or 4 ARINC 818, 2 CVBS|
|VPX3U-A4500E-VO||1448||NVIDIA A4500E||5888||16||PCIe Gen4||4|
|VPX3U-A4500E-CX7||144L||NVIDIA A4500E, ConnectX-7||5888||16||40/100 GbE, PCIe Gen4|
|VPX3U-A4500E-IO||1440||NVIDIA A4500E||5888||16||PCIe Gen4||2||2 3G-SDI, 2 Analog||2 3G-SDI|
|VPX3U-A2000E-FGX2-COAX||1471||NVIDIA A2000||2560||8||PCIe Gen4||4 12G-SDI||2 12G-SDI, 2 CVBS|
|14T0||NVIDIA Orin, ConnectX-7, FGX2||2048||64 (LPDDR5)||40/100 GbE, PCIe Gen4, USB||1 MST DisplayPort or HDMI||1 SDI, 1 Analog||2 SDI|
|14TZ||NVIDIA Orin, ConnectX-7||2048||64 (LPDDR5)||40/100 GbE, PCIe Gen4, USB|
|VPX3U-ORIN-CX6-HPC "Bowie"||14TY||NVIDIA Orin, ConnectX-6||2048||64 (LPDDR5)||40/100 GbE, PCIe Gen4, USB|
|VPX3U-ORIN-CX6-FGX-SBC (WOLF-14T3) "Machete"||14T3||NVIDIA Orin, ConnectX-6||2048||64 (LPDDR5||40/100 GbE, PCIe Gen4, USB||1 MST DisplayPort or HDMI||HD or 3G-SDI, CVBS||HD or 3G-SDI, CVBS|
|14T2||NVIDIA Orin, ConnectX-6||2048||64 (LPDDR5)||40/100 GbE, PCIe Gen4, USB||1 MST DisplayPort or HDMI|
|14T1||NVIDIA Orin||2048||64 (LPDDR5)||PCIe Gen4, USB||1 MST DisplayPort or HDMI|
|VPX3U-XAVIER-CX6-SBC||12T0||NVIDIA Xavier Industrial, ConnectX-6, FGX||512||32 (LPDDR4)||40/100 GbE, PCIe Gen4, USB||3||2 SDI, 2 Analog||2 SDI|
|VPX3U-XAVIER-CX6-HPC||12TZ||NVIDIA Xavier Industrial, ConnectX-6||512||32 (LPDDR4)||40/100 GbE, PCIe Gen4, USB|
|VPX3U-RTX5000E-VO||1348||NVIDIA RTX5000E||3072||16||PCIe Gen3||4|
|VPX3U-RTX5000E-COAX-CV||1349||NVIDIA RTX5000E||3072||16||PCIe Gen4||0||2 SDI, 2 Analog|
|VPX3U-RTX5000E-16PCIE||134C||NVIDIA RTX5000E||3072||16||PCIe Gen4|
|VPX3U-RTX5000E-SWITCH||134S||NVIDIA RTX5000E||3072||16||10GbE, PCIe Gen4|
|VPX3U-P5200E-VO||1116||NVIDIA P5200E||2560||16||PCIe Gen3||4|
|VPX3U-P2000E-VO||1178||NVIDIA P2000E||768||4||PCIe Gen3||4|
|VPX3U-P2000E-SDI-4IO||1110||NVIDIA P2000E||768||4||PCIe Gen3||4||4 SDI, 0 - 4 Analog||4 SDI, 0 - 4 Analog|
|VPX3U-RTX3000E-VO||1368||NVIDIA RTX3000E||1920||6||PCIe Gen3||4|
|VPX3U-TESLA-P6-HPC||1116||NVIDIA P6||2048||16||PCIe Gen3, 16 vGPU|
|VPX3U-P5000-VO||1116||NVIDIA P5000||2048||16||PCIe Gen3||4|
|VPX3U-P3000-VO||1116||NVIDIA P3000||1280||6||PCIe Gen3||4|
|VPX3U-P5000-SDI-4IO||1110||NVIDIA P5000||2048||16||PCIe Gen3||4||4 SDI, 0 - 4 Analog||4 SDI, 0 - 4 Analog|
|VPX3U-P3000-SDI-4IO||1110||NVIDIA P3000||1280||6||PCIe Gen3||4||4 SDI, 0 - 4 Analog||4 SDI, 0 - 4 Analog|
See the WOLF 3U Products Grid
3U VPX Information
The VPX base standard defined in VITA 46 is a scalable module and backplane technology designed specifically for high speed, critical embedded systems. WOLF’s 3U VPX modules use the 1" pitch allowed in VITA 48 (VPX REDI). WOLF carrier boards are designed to provide system designers with a flexible, highly configurable PCI Express interface enabling a broad range of switch link configurations.
WOLF's 3U VPX modules include air cooled and conduction cooled options,
with other advanced cooling solutions available for MCOTS or Custom solutions.
VPX references VITA standards such as:
- VITA 46 (VPX base, 2007): the VPX base electrical and mechanical specification
- VITA 48 (VPX REDI, 2010): further support for high-density electronic modules
- VITA 65 (OpenVPX, 2010): addresses interoperability
- VITA 66 (Optical Interconnect, 2013): defines a family of blind mate Fiber Optic interconnects
- VITA 67 (Blind mate analog connectors, 2012): defines a family of interconnects and configurations
VITA 46 defines the 3U VPX dimensions
The VITA 46 working group was first launched in 2003. At that time VMEbus systems (first introduced in 1981) were in wide use. VME systems used a VME parallel bus with a maximum bandwidth of 320 Mbytes/second (as defined in VITA 1.5, released in 2003). The newer VPX standard was defined to use the latest in switch serial fabrics, which provided a much higher maximum bandwidth. VPX connectors (board interconnects) are high speed MultiGIG RT connectors which support high speed serial buses. The MultiGIG RT 2 supports 10 Gbps, with the RT 2-S supporting 16 Gbps. The recently developed MultiGIG RT 3 connectors can support up to 32 Gbps, allowing support for PCIe Gen 4 and Ethernet 100GBase-KR4.
3U VPX cards use 3 connectors (P0 to P2) while 6U VPX cards use 7 connectors (P0 to P6). P0 is reserved for power and system control signals. P1 and P2 are used for high speed serial bus signals and user I/O. On a 6U VPX the remaining connectors (P3 to P6) are used for user I/O.
The VPX specification was extended in VITA 48 (VITA REDI, Ruggedized Enhanced Design Implementation) to support the increased operating power of high-density electronic modules by defining the mechanical design requirements to support enhanced cooling methods. VPX REDI also sets standards for the use of ESD covers on both sides of boards. WOLF VPX modules comply with the VPX REDI (VITA 48) standard.
OpenVPX (VITA 65) is a system-level VPX specification designed to address interoperability between VPX boards and backplanes from multiple vendors. It was ratified in 2010.
Additional VITA standards have been ratified to support specific types of connectivity and other issues, and new VITA standards are still being actively worked on by their respective VITA committees.
For a complete history of these VITA standards see https://www.vita.com/History.